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KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTRODUCTION KS0070B is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS technology. It is capable of displaying 1 or 2 lines with the 5x7 format or 1 line with the 5x10 dots format.
FUNCTIONS * Character type dot matrix LCD driver & controller * Internal driver: 16 common and 80 segment signal output * Easy interface with 4-bit or 8-bit MPU * Display character pattern: 5x7 dots format (192 kinds) & 5x10 dots format (32 kinds) * The special character pattern is directly programmable by the character generator RAM. * A customer character pattern is programmable by mask option. * It can drive a maximum of 80 characters by using the KS0065B or KS0063B externally. * Various instruction functions * Built-in automatic power on reset * Driving method is A-type (Line inversion)
FEATURES * Internal Memory - Character Generator ROM (CGROM): 8,320 bits (192 characters x 5 x 7 dots) & (32 characters x 5 x 10 dots) - Character Generator RAM (CGRAM): 64 x 8 bits (8 characters x 5 x 7 dots) - Display Data RAM (DDRAM): 80 x 8 bits (80 characters max.) * Low power operation - Power supply voltage range: 2.7 to 5.5 V (VDD) - LCD Drive voltage range: 3.0 to 10.0 V (VDD to V5) * Supply voltage for display: 0 to -5 V (V5) * Programmable duty cycle: 1/8, 1/11, 1/16 * Internal oscillator with an external resistor * Bare chip or bumped chip available
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BLOCK DIAGRAM
VDD GND V1 V2 V3 V4 V5 5 Busy Flag Character Generator ROM (CG ROM) 8320 bits
Parallel to serial Data conversion circuit
5
Character Generator RAM (CG RAM) 512 bits
Cursor Blink Control Circuit
4 DB0-DB3 4 DB4-DB7 Input Output R/W RS E Buffer 8 8 Data Register (DR)
8
8 80 bit 80 bit Latch Circuit Segment 80 Driver SEG1SET80
8
8
shift Register
Instruction 8 Instruction Register Decoder (IR) (ID)
Display Data RAM (DD RAM) 7 640 bits 7
D 7 Address Counter (AC) 7 16 bit Shift Register 16-bit 16 common Driver
COM1COM16
OSC1 OSC2
Timing Generation Circuit
CLK1 CLK2 M
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN CONFIGURATION
SEG34 128
SEG35 127
SEG36 126
SEG37 125
SEG38 124
SEG39 123
SEG40 122
SEG41 121
SEG42 120
SEG43 119
SEG44 118
SEG45 117
SEG46 116
SEG47 115
SEG48 114
SEG49 113
SEG50 112
SEG51 111
SEG52 110
SEG53 109
SEG54 108
SEG55 107
SEG56 106
SEG57 105
SEG58 104
SEG59 103
NC SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VSS OSC2 OSC1 NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 58 39 NC 40 NC 41 NC 42 V1 43 V2 44 V3 45 V4 46 V5 47 CLK1 48 CLK2 49 M 50 D 51 RS 52 R/W 53 E 54 VDD 55 DB0 56 57 59 60 61 62 63 64
102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85
SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 NC
KS0070B
84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
DB1
DB2
DB3
DB4
DB5
DB6
DB7
TEST
NC
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD CONFIGURATION 1) NORMAL TYPE PAD CONFIGURATION
SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VSS OSC2 OSC1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103
SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59
Y
(0, 0)
X
CHIP SIZE: 3920 x 5070 PAD SIZE: 100 x 100 UNIT: m
102 SEG60 101 SEG61 100 SEG62 99 SEG63 98 SEG64 97 SEG65 96 SEG66 95 SEG67 94 SEG68 93 SEG69 92 SEG70 91 SEG71 90 SEG72 89 SEG73 88 SEG74 87 SEG75 86 SEG76 85 SEG77 84 SEG78 83 SEG79 82 SEG80 81 COM16 80 COM15 79 COM14 78 COM13 77 COM12 76 COM11 75 COM10 74 COM9 73 COM8 72 COM7 71 COM6 70 COM5 69 COM4 68 COM3 67 COM2 66 COM1
V1 V2 V3 V4 V5 CLK1 CLK2 M D RS RW E VDD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 TEST
42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
KS0070B
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
2) MIRROR TYPE PAD CONFIGURATION
SEG60 2 SEG61 3 SEG62 4 SEG63 5 SEG64 6 SEG65 7 SEG66 8 SEG67 9 SEG68 10 SEG69 11 SEG70 12 SEG71 13 SEG72 14 SEG73 15 SEG74 16 SEG75 17 SEG76 18 SEG77 19 SEG78 20 SEG79 21 SEG80 22 COM16 23 COM15 24 COM14 25 COM13 26 COM12 27 COM11 28 COM10 29 COM9 30 COM8 31 COM7 32 COM6 33 COM5 34 COM4 35 COM3 36 COM2 37 COM1 38
128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103
SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34
KS0070BM
Y
(0, 0)
X
CHIP SIZE: 3920 x 5070 PAD SIZE: 100 x 100 UNIT: m
102 SEG33 101 SEG32 100 SEG31 99 SEG30 98 SEG29 97 SEG28 96 SEG27 95 SEG26 94 SEG25 93 SEG24 92 SEG23 91 SEG22 90 SEG21 89 SEG20 88 SEG19 87 SEG18 86 SEG17 85 SEG16 84 SEG15 83 SEG14 82 SEG13 81 SEG12 80 SEG11 79 SEG10 78 SEG9 77 SEG8 76 SEG7 75 SEG6 74 SEG5 73 SEG4 72 SEG3 71 SEG2 70 SEG1 69 VSS 68 OSC2 67 OSC1
TEST DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 VDD E RW RS D M CLK2 CLK1 V5 V4 V3 V2 V1
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD COORDINATE 1) NORMAL TYPE PAD COORDINATE
PAD PAD COORDINATE PAD NO. NAME NO. X Y 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 NC 2169 2044 1919 1794 1669 1544 1419 1294 1169 1044 919 794 669 544 419 294 169 44 -81 -206 -331 -456 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 PAD COORDINATE PAD NAME NO X Y SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VSS OSC2 OSC1 NC NC NC NC V1 V2 V3 V4 V5 -1794 -1794 -1794 -1794 -581 -706 -831 -956 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 PAD NAME CLK1 CLK2 M D RS RW E VDD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 TEST NC NC COM1 COM2 COM3 COM4 COORDINATE PAD PAD COORDINATE NO. NAME X Y X Y -530 -405 -280 -155 -30 95 220 345 470 595 720 845 970 1095 1220 1345 1470 1794 1794 1794 1794 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2331 -2206 -2081 -1956 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 COM5 COM6 COM7 COM8 COM9 1794 1794 1794 1794 1794 -1831 -1706 -1581 -1456 -1331 -1206 -1081 -956 -831 -706 -581 -456 -331 -206 -81 44 169 294 419 544 669 794 919
SEG33 -1794 SEG32 -1794 SEG31 -1794 SEG30 -1794 SEG29 -1794 SEG28 -1794 SEG27 -1794 SEG26 -1794 SEG25 -1794 SEG24 -1794 SEG23 -1794 SEG22 -1794 SEG21 -1794 SEG20 -1794 SEG19 -1794 SEG18 -1794 SEG17 -1794 SEG16 -1794 SEG15 -1794 SEG14 -1794 SEG13 -1794 SEG12 -1794
-1794 -1081 -1794 -1206 -1794 -1331 -1794 -1456 -1794 -1581 -1794 -1706 -1794 -1831 -1794 -1956 -1794 -2106 -1794 -2231 -
COM10 1794 COM11 1794 COM12 1794 COM13 1794 COM14 1794 COM15 1794 COM16 1794 SEG80 SEG79 SEG78 SEG77 SEG76 SEG75 SEG74 SEG73 SEG72 SEG71 SEG70 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794
-1155 -2369 -1030 -2369 -905 -780 -655 -2369 -2369 -2369
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
NORMAL TYPE PAD COORDINATE (CONTINUED) PAD PAD NO. NAME 93 94 95 96 97 98 99 COORDINATE X Y 1044 1169 1294 1419 1544 1669 1794 1919 2044 PAD NO. 102 103 104 105 106 107 108 109 110 PAD NAME SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 COORDINATE X 1794 1563 1438 1313 1188 1063 938 813 688 Y 2169 2369 2369 2369 2369 2369 2369 2369 2369 PAD NO. 111 112 113 114 115 116 117 118 119 PAD NAME SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 COORDINATE X 563 438 313 188 63 -62 -187 -312 -437 Y 2369 2369 2369 2369 2369 2369 2369 2369 2369 PAD NO. 120 121 122 123 124 125 127 127 128 PAD NAME SEG42 SEG41 SEG40 SEG39 COORDINATE X-562 -687 -812 -937 Y2369 2369 2319 2369 2369 2369 2369 2369 2369
SEG69 1794 SEG68 1794 SEG67 1794 SEG66 1794 SEG65 1794 SEG64 1794 SEG63 1794
SEG38 -1062 SEG37 -1187 SEG36 -1312 SEG35 -1437 SEG34 -1562
100 SEG62 1794 101 SEG61 1794
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
2) MIRROR TYPE PAD COORDINATE
PAD PAD NO. NAME 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 NC
COORDINATE X Y 2169 2044 1919 1794 1669 1544 1419 1294 1169 1044 919 794 669 544 419 294 169 44 -81 -206 -331 -456
PAD NO. 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46
PAD NAME
COORDINATE X Y -581 -706 -831 -956
PAD NO 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69
PAD NAME DB2 DB1 DB0 VDD E RW RS D M CLK2 CLK1 V5 V4 V3 V2 V1 NC NC NC NC OSC1 OSC2 VSS
COORDINATE X -720 -595 -470 -345 -220 -95 30 155 280 405 530 655 780 905 1030 1155 1794 1794 1794 Y -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2231 -2106 -1956
PAD PAD NO. NAME 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23
COORDINATE X 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 Y -1831 -1706 -1581 -1456 -1331 -1206 -1081 -956 -831 -706 -581 -456 -331 -206 -81 44 169 294 419 544 669 794 919
COM15 -1794 COM14 -1794 COM13 -1794 COM12 -1794
SEG60 -1794 SEG61 -1794 SEG62 -1794 SEG63 -1794 SEG64 -1794 SEG65 -1794 SEG66 -1794 SEG67 -1794 SEG68 -1794 SEG69 -1794 SEG70 -1794 SEG71 -1794 SEG72 -1794 SEG73 -1794 SEG74 -1794 SEG75 -1794 SEG76 -1794 SEG77 -1794 SEG78 -1794 SEG79 -1794 SEG80 -1794 COM16 -1794
COM11 -1794 -1081 COM10 -1794 -1206 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 NC NC TEST DB7 DB6 DB5 DB4 DB3 -1794 -1331 -1794 -1456 -1794 -1581 -1794 -1706 -1794 -1831 -1794 -1956 -1794 -2081 -1794 -2206 -1794 -2331 -
-1470 -2369 -1345 -2369 -1220 -2369 -1095 -2369 -970 -845 -2369 -2369
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
MIRROR TYPE PAD COORDINATE (CONTINUED) PAD PAD NO. NAME 93 94 95 96 97 98 99 COORDINATE X Y 1044 1169 1294 1419 1544 1669 1794 1919 2044 PAD NO. 102 103 104 105 106 107 108 109 110 PAD NAME SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 COORDINATE X 1794 1562 1437 1312 1187 1062 937 812 687 Y 2169 2369 2369 2369 2369 2369 2369 2369 2369 PAD NO. 111 112 113 114 115 116 117 118 119 PAD NAME SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 COORDINATE X 562 437 312 187 62 -63 -188 -313 -438 Y 2369 2369 2369 2369 2369 2369 2369 2369 2369 PAD NO. 120 121 122 123 124 125 127 127 128 PAD NAME SEG51 SEG52 SEG53 SEG54 COORDINATE X -563 -688 -813 -938 Y 2369 2369 2369 2369 2369 2369 2369 2369 2369
SEG24 1794 SEG25 1794 SEG26 1794 SEG27 1794 SEG28 1794 SEG29 1794 SEG30 1794
SEG55 -1063 SEG56 -1188 SEG57 -1313 SEG58 -1438 SEG59 -1563
100 SEG31 1794 101 SEG32 1794
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD DESCRIPTION Pad No. (Normal/Mirror) VDD (54/50) VSS(35, 69) V1 ~ V5 (42~46/62~58) SEG1 ~ SEG80 (34~2, 128~82/ 70~128, 2~22) COM1 ~ COM16 (66~81/38~23) OSC1,OSC2 (37,36/67,68) Output Segment output Power supply Input/ Output
Name
Description For logical circuit (+3 V, + 5 V) 0 V (GND) Bias voltage level for LCD driving.
Interface
Power Supply
Segment signal output for LCD drive.
LCD
Output Input (OSC1)/ Output (OSC2) Output
Common output
Common signal output for LCD drive. When using internal oscillator, connect external Rf resistor. If external clock is used, connect it to OSC1. Each outputs extension driver latch clock and extension driver shift clock. Outputs the alternating signal to convert LCD driver waveform to AC. Output extension driver data (the 41st dot's data) Used as register selection input. When RS = "1", Data register is selected. When RS = "0", Instruction register is selected. Used as read/write selection input. When RW = "1", read operation. When RW = "0", write operation. Used as read. Write enable signal. When 8-bit bus mode, used as low order bidirectional data bus. During 4-bit bus mode open these pins.
LCD External resistor/ oscillator (OSC1) Extension driver Extension driver Extension driver
Oscillator
CLK1,CLK2 (47,48/57,56)
Extension driver Latch (CLK1)/Shift (CLK2) clock Alternated signal for LCD driver output Display data interface
M (49/55)
Output
D (50/54)
Output
RS (51/53)
Input
Register select
MPU
RW (52/52) E (53/51) DB0~DB3 (55~58/49~46)
Input Input
Read/Write Read/Write enable
MPU MPU MPU
DB4~DB7 (59~62/45~42)
Input / Output
Data bus 0~7
When 8-bit bus mode, used as high order bidirectional data bus. In case of 4-bit bus mode, used as both high and low order. DB7 used for Busy Flag output. This pin must be fixed to VDD or open.
MPU
TEST (63/41)
Input
Test Pin
-
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
FUNCTION DESCRIPTION System Interface This chip has both kinds of interface type with MPU: 4-bit bus and 8-bit bus. 4-bit bus and 8-bit bus are selected by the DL bit in the instruction register. During read or write operation, two 8-bit registers are used. One is the data register (DR), and the other is the instruction register (IR). The data register (DR) is used as a temporary data storage place for being written into or read from DDRAM/ CGRAM. Target RAM is selected by RAM address setting instruction. Each internal operation, reading from or writing into RAM, is done automatically. After MPU reads DR data, the data in the next DDRAM/CGRAM address is transferred into DR automatically. Also, after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM automatically. The Instruction register (IR) is used only to store instruction codes transferred from MPU. MPU cannot use it to read instruction data. To select a register, use RS input pin in 4-bit/8-bit bus mode.
Table 1. Various Kinds of Operations According to RS and R/W bits. RS 0 0 1 1 R/W 0 1 0 1 Operation Instruction Write operation (MPU writes Instruction code into IR) Read Busy flag (DB7) and address counter (DB0 ~ DB6) Data Write operation (MPU writes data into DR) Data Read operation (MPU reads data from DR)
Busy Flag (BF) When BF = "1", it indicates that the internal operation is being processed. So during this time the next instruction cannot be accepted. BF can be read, when RS = "0" and R/W = "1" (Read Instruction Operation), through DB7 port. Before executing the next instruction, be sure that BF is not "1".
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Address Counter (AC) The Address Counter (AC) stores DDRAM/CGRAM addresses, transferred from IR. After writing into (reading from) DDRAM/CGRAM, AC is automatically increased (decreased) by 1. When RS = "0" and R/W = "1", AC can be read through ports DB0~DB6.
Display Data RAM (DDRAM) DDRAM stores display data of maximum 80 x 8 bits (80 characters). DDRAM address is set in the address counter (AC) as a hexadecimal number. (Refer to Fig-1.)
MSB AC6 AC5 AC4 AC3 AC2 AC1
LSB AC0
Fig-1. DDRAM Address
1) 1-line display In the case of a 1-line display, the address range of DDRAM is 00H ~ 4FH. An Extension driver will be used. Fig-2 shows the example when a 40-segment extension driver is added.
2) 2-line display In the case of a 2-line display, the address range of DDRAM is 00H ~27H and 40H ~ 67H. An Extension driver will be used. Fig-3 shows the example when a 40 segment extension driver is added.
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
1
COM1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 10 11 12 13 14 15 16 17
SEG1 Extension Driver (40SEG) SEG40
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D OE OF
COM8 SEG1
KS0070B
2 3 4 5 6 7 8 9
SEG80
1
COM1
10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 11 12 13 14 15 16 17 18
SEG1 Extension Driver (40SEG) SEG40
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10
COM8 SEG1 COM1
KS0070B
2 3 4 5 6 7 8 9
SEG80
(After Shift Left)
1
COM8
10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 0F 10 11 12 13 14 15 16
SEG1 Extension Driver (40SEG) SEG40
4F 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E
SEG1
KS0070B (After Shift Right)
Fig-2. 1-line x 24ch. Display With 40 SEG. Extension Driver.
1
COM1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 10 11 12 13 14 15 16 17
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D OE OF
COM8 COM9
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
COM10 SEG1
50 51 52 53 54 55 56 57
SEG1 Extension Driver (40SEG) SEG40
KS0070B
2 3 4 5 6 7 8 9
SEG80
1
COM1
10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 11 12 13 14 15 16 17 18
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10
COM8 COM1
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50
COM8 SEG1
51 52 53 54 55 56 57 58
SEG1 Extension Driver (40SEG) SEG40
KS0070B
SEG80
(After Shift Left)
1
COM1 COM8 COM9 COM10
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 0F 10 11 12 13 14 15 16
27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E
67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E
SEG1
4F 50 51 52 53 54 55 56
SEG1 Extension Driver (40SEG) SEG40
KS0070B
SEG80
(After Shift Right)
Fig-3. 2-line x 24ch. Display With 40 SEG. Extension Driver.
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CGROM (Character Generator ROM) CGROM has a 5 x 7-dot 192 character pattern, and a 5 x 10-dot 32 character pattern (Refer to Table 2).
CGRAM (Character Generator RAM) CGRAM has up to 5 x 8-dot 8 characters. By writing font data to CGRAM, user defined characters can be used (Refer to Table 3).
Timing Generation Circuit Timing generation circuit generates clock signals for the internal operations.
LCD Driver Circuit LCD Driver circuit has 16 common and 80 segment signals for LCD driving. Data from CGRAM/CGROM is transferred to an 80-bit segment latch serially, and then stored to an 80-bit shift latch. When each com is selected by a 16-bit common register, segment data is also output through the segment driver from an 80-bit segment latch. In the case of a 1-line display mode, COM1 ~ COM8 have 1/8 duty or COM1 ~ COM11 have a 1/11 duty. In a 2-line display mode, COM1 ~ COM16 have a 1/16 duty ratio.
Cursor/Blink Control Circuit It controls cursor/blink ON/OFF at cursor position.
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Table 2. CGROM Character Code Table
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Table 3. Relationship Between Character Code (DDRAM) and Character Pattern (CGRAM) Character Code (DDRAM data) 0 0 0 0 x 0 0 0 0 CGRAM Address 0 0 0 0 * * * * * * * * 0 0 1 1 1 1 * * * * 0 0 0 0 x 1 1 1 1 1 1 * * * * 0 0 * * * * * * * * 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 * * * * x x x 1 1 1 1 1 1 1 0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 * * * * x x CGRAM Data x 0 1 1 1 1 1 1 0 * * * * 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 0 * "x ": don' care t pattern 8 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 0 0 1 1 1 1 1 1 0 Pattern number pattern 1
D7 D6 D5 D4 D3 D2 D1 D0 A5 A4 A3 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P0
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INSTRUCTION DESCRIPTION Outline To overcome the speed difference between the internal clock of KS0070B and the MPU clock, KS0070B performs internal operations by storing control information to IR or DR. The internal operation is determined according to the signal from MPU, composed of read/write and data bus (Refer to Table 5 ). Instruction can be divided largely into four kinds: (1) KS0070B function set instructions ( set display methods, set data length, etc.) (2) address set instructions to internal RAM (3) data transfer instructions with internal RAM (4) others . The address of the internal RAM is automatically increased or decreased by 1. * NOTE: During internal operation, Busy Flag (DB7) is read "1". Busy Flag check must be preceded by the next instruction. When you make an MPU program with checking the Busy Flag (DB7), it must be necessary 1/2 Fosc for executing the next instruction by falling E signal after the Busy Flag (DB7) goes to "0". Contents 1) Clear Display RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1
Clear all the display data by writing "20H" (space code) to all DDRAM addresses, and set the DDRAM addresses to "00H" in the AC (address counter). Return cursor to original status, namely, bring the cursor to the left edge on first line of the display. Make entry mode increment (I/D = "1").
2) Return Home RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 1 DB0 x
Return Home is the cursor return home instruction. Set DDRAM address to "00H" in the address counter. Return cursor to its original site and return display to its original status, if shifted. Contents of DDRAM does not change.
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
3) Entry Mode Set RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 1 DB1 I/D DB0 SH
Set the moving direction of cursor and display. I/D : Increment / decrement of DDRAM address (cursor or blink) When I/D = "1", cursor/blink moves to right and DDRAM address is increased by 1. When I/D = "0", cursor/blink moves to left and DDRAM address is decreased by 1. * CGRAM operates the same as DDRAM, when reading from or writing to CGRAM. SH: Shift of entire display When DDRAM is in read (CGRAM read/write) operation or SH = "0", shift of entire display is not performed. If SH = "1" and in DDRAM write operation, shift of entire display is performed according to I/D value (I/D = "1" : shift left, I/D = "0" : shift right).
4) Display ON/OFF Control RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 1 DB2 D DB1 C DB0 B
Control display/cursor/blink ON/OFF 1-bit register. D : Display ON/OFF control bit When D = "1", entire display is turned on. When D = "0", display is turned off, but display data remains in DDRAM. C : Cursor ON/OFF control bit When C = "1", cursor is turned on. When C = "0", cursor disappears in current display, but I/D register retains its data. B : Cursor Blink ON/OFF control bit When B = "1", cursor blink is on, which performs alternately between all the "1" data and display characters at the cursor position. When B = "0", blink is off.
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
5) Cursor or Display Shift RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 1 DB3 S/C DB2 R/L DB1 x DB0 x
Without writing or reading the display data, shift right/left cursor position or display. This instruction is used to correct or search display data.(Refer to Table 4) During 2-line mode display, cursor moves to the 2nd line after the 40st digit of the 1st line. Note that display shift is performed simultaneously in all the lines. When displayed data is shifted repeatedly, each line shifts individually. When display shift is performed, the contents of the address counter are not changed.
Table 4. Shift Patterns According to S/C and R/L bits S/C 0 0 1 1 R/L 0 1 0 1 Operation Shift cursor to the left, AC is decreased by 1 Shift cursor to the right, AC is increased by 1 Shift all the display to the left, cursor moves according to the display Shift all the display to the right, cursor moves according to the display
6) Function Set RS 0 R/W 0 DB7 0 DB6 0 DB5 1 DB4 DL DB3 N DB2 F DB1 x DB0 x
DL : Interface data length control bit When DL = "1", it means 8-bit bus mode with MPU. When DL = "0", it means 4-bit bus mode with MPU. So to speak, DL is a signal to select 8-bit or 4-bit bus mode. When 4-bit bus mode, it needs to transfer 4-bit data in two parts. N : Display line number control bit When N = "0", it means 1-line display mode. When N = "1", 2-line display mode is set. F : Display font type control bit When F = "0", 5 x 7 dots format display mode When F = "1", 5 x 10 dots format display mode.
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
7) Set CGRAM Address RS 0 R/W 0 DB7 0 DB6 1 DB5 AC5 DB4 AC4 DB3 AC3 DB2 AC2 DB1 AC1 DB0 AC0
Set CGRAM address to AC. This instruction makes CGRAM data available from MPU.
8) Set DDRAM Address RS 0 R/W 0 DB7 1 DB6 AC6 DB5 AC5 DB4 AC4 DB3 AC3 DB2 AC2 DB1 AC1 DB0 AC0
Set DDRAM address to AC. This instruction makes DDRAM data available from MPU. When in 1-line display mode (N = 0), DDRAM address is from "00H" to "4FH". In 2-line display mode (N = 1), DDRAM address in the 1st line is from "00H" to "27H", and DDRAM address in the 2nd line is from "40H" to "67H".
9) Read Busy Flag & Address RS 0 R/W 0 DB7 BF DB6 AC6 DB5 AC5 DB4 AC4 DB3 AC3 DB2 AC2 DB1 AC1 DB0 AC0
This instruction shows whether KS0070B is in internal operation or not. If the resultant BF is "1", it means the internal operation is in progress and you have to wait until BF is Low. Then the next instruction can be performed. In this instruction you can also read the value of the address counter.
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
10) Write data to RAM RS 1 R/W 0 DB7 D7 DB6 D6 DB5 D5 DB4 D4 DB3 D3 DB2 D2 DB1 D1 DB0 D0
Write binary 8-bit data to DDRAM/CGRAM. The selection of RAM from DDRAM, and CGRAM, is set by the previous address set instruction : DDRAM address set, and CGRAM address set. RAM set instruction can also determine the AC direction to RAM. After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
11) Read data from RAM RS 1 R/W 1 DB7 D7 DB6 D6 DB5 D5 DB4 D4 DB3 D3 DB2 D2 DB1 D1 DB0 D0
Read binary 8-bit data from DDRAM/CGRAM. The selection of RAM is set by the previous address set instruction. If the address set instruction of RAM is not performed before this instruction, the data that is read first is invalid, because the direction of AC is not determined. If you read RAM data several times without RAM address set instruction before read operation, you can get correct RAM data from the second, but the first data would be incorrect, because there is no time margin to transfer RAM data. In the case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM address set instruction; It also transfers RAM data to the output data register. After read operation the address counter is automatically increased/decreased by 1 according to the entry mode. After CGRAM read operation, display shift may not be executed correctly. * In the case of RAM write operation, after this AC is increased/decreased by 1 like read operation. At this time, AC indicates the next address position, but you can read only the previous data by the read instruction.
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Table 5. Instruction Table Instruction Code Instruction RS R/WDB7DB6DB5DB4DB3DB2DB1DB0 Clear Display Return Home Entry Mode Set Display ON/ OFF Control Cursor or Display Shift Function Set Set CGRAM Address Set DDRAM Address Read Busy flag and Address Write Data to RAM Read Data from RAM 0 0 0 0 0 0 0 0 0 1 Write "20H" to DDRAM and set DDRAM address to "00H" from AC. Description Execution Time (fosc = 270 kHz) 1.53 ms
0
0
0
0
0
0
0
0
1
Set DDRAM address to "00H" from AC x and return cursor to its original position if shifted. Assign cursor moving direction and enable the shift of entire display . Set display (D), cursor (C), and blinking of cursor (B) on/off control bit.
1.53 ms 39 s 39 s 39 s
0 0
0 0
0 0
0 0
0 0
0 0
0 1
1 D
I/D SH C B
0
0
0
0
0
1 S/C R/L x
Set cursor moving and display shift x control bit, and the direction, without changing of DDRAM data. Set interface data length (DL : 4-bit/8x bit), numbers of display line (N : 1-line/ 2-line, Display font type (F:0 ...) Set CGRAM address in address counter. Set DDRAM address in address counter.
0
0
0
0
1
DL
N
F
x
39 s 39 s 39 s
0 0
0 0
0
1 AC5AC4AC3AC2AC1AC0
1 AC6AC5AC4AC3AC2AC1AC0
0
1
Whether during internal operation or not can be known by reading BF. BF AC6AC5AC4AC3AC2AC1AC0 The contents of address counter can also be read. D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 Write data into internal RAM (DDRAM/CGRAM). Read data from internal RAM (DDRAM/CGRAM).
0 s
1 1
0 1
43 s 43 s
* NOTE : When you make an MPU program with checking the Busy Flag (DB7), it must be necessary 1/2Fosc for executing the next instruction by falling E signal after the Busy Flag (DB7) goes to "0".
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTERFACE WITH MPU 1) Interface with 8-bit MPU When interfacing data length are 8-bit, transfer is performed all at once through 8 ports, from DB0 to DB7. An Example of the timing sequence is shown below.
RS R/W E Internal signal DB7 DATA Internal operation Busy Busy
No Busy
DATA
INSTRUCTIO N
Busy Flag Check
Busy Flag Check
Busy Flag Check
INSTRUCTION
Fig-4. Example of 8-bit Bus Mode Timing Diagram 2) Interface with 4-bit MPU When interfacing data length are 4-bit, only 4 ports, from DB4 to DB7, are used as data bus. At first, higher 4-bit (in case of 8-bit bus mode, the contents of DB4 - DB7) are transferred, and then the lower 4-bit (in case of 8-bit bus mode, the contents of DB0 - DB3) are transferred. So transfer is performed in two parts. Busy Flag outputs "1" after the second transfer are ended. Example of timing sequence is shown below.
RS R/W E Internal signal DB7
D7 D3
Internal operation
Busy AC3 No Busy AC3 D7 D3
INSTRUCTION
Busy Flag Check
Busy Flag Check
INSTRUCTIO N
Fig-5. Example of 4-bit Bus Mode Timing Diagram
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
APPLICATION INFORMATION ACCORDING TO LCD PANEL 1) LCD Panel: 16 characters x 1-line format ( 5 x 7 dots + 1 cursor line 1/4 bias, 1/8 duty)
COM1 ... COM7 COM8 SEG1
KS0070B
... SEG10 SEG78 SEG79 SEG80 ...
2) LCD Panel: 16 characters x 1-line format (5 x 10 dots + 1 cursor line 1/4 bias, 1/11 duty)
COM1
COM10 COM11
KS0070B
SEG1
SEG10 SEG78 SEG79 SEG80 ...
...
...
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
3) LCD Panel : 16 character x 2-line format: (5 x 7 dots + 1 cursor line 1/5 bias, 1/16 duty)
COM1 ... COM7 COM8 COM9 ...
KS0070B
COM15 COM16 SEG1 ... SEG10 SEG80 ...
4) LCD Panel : 32 character x 1-line format: ( 5 x 7 dots + 1 cursor line 1/5 bias, 1/16 duty)
COM1 ... COM7 COM8 SEG1
KS0070B
SEG10 SEG80 COM9 ... COM16
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
5) LCD Panel : 8 character x 2-line format: ( 5 x 7 dots + 1 cursor line 1/4 bias, 1/8 duty)
SEG1 ... SEG10 SEG40 COM1 ... COM7 COM8 ...
KS0070B
SEG41 ... SEG50 SEG80 ...
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
APPLICATION CIRCUIT
LCD Panel
C1 - C16 S1 - S80 SC1 - SC40 SC1 - SC40 SC1 - SC40 DL1 FCS SHL1 SHL2 VSS VDD DL2 DL1 DR2 CL1 CL2 M DL2 DL1 DR2 CL1 CL2 M DL2 DL1 DR2 CL1 CL2 M
KS0065B
OSC1 OSC2
DL1 FCS SHL1 SHL2 VSS VDD
KS0065B
DL1 FCS SHL1 SHL2 VSS VDD
KS0070B
VSS M CLK1 CLK2 VDD V1 V2 V3 V4 V5 DB0 - DB7
V VVVVVVE 654321E
V VVVVVVE 654321E
V VVVVVVE 654321E
KS0065B
D
VDD
To MPU
GND or Other voltage
* When KS0065B is externally connected to the KS0070B, you can increase the number of display digits up to 80 characters
VLCD (1/5 bias)
V1 V2 V3 V4 V5
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BIAS VOLTAGE DIVIDE CIRCUIT 1) 1/4 bias, 1/8 OR 1/11 duty 2) 1/5 bias, 1/16 OR 1/11 duty
VDD R R R R
VDD V1 V2
VDD R R
VDD V1 V2
KS0070B
V3 V4
R V3 R V4 R V5
GND OR OTHER
KS0070B
V5
GND OR OTHER
VOLTAGE
VOLTAGE
INITIALIZING When the power is turned on, KS0070B is initialized automatically by the power on reset circuit. During the initialization, the following instructions are executed, and BF(Busy Flag) is kept "1"(busy state) to the end of initialization. (1) Display Clear instruction Write "20H" to all DDRAM (2) Set Functions instruction DL = 1 : 8-bit bus mode N = 0 : 1-line display mode F = 0 : 5x7 font type (3) Control Display ON/OFF instruction D = 0 : Display OFF C = 0 : Cursor OFF B = 0 : Blink OFF (4) Set Entry Mode instruction I/D = 1 : Increment by 1 SH = 0 : No entire display shift
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
FRAME FREQUENCY 1) 1/8 duty cycle A) A-type Waveform 1-line selection period 1 VDD V1 COM1 ... ... ... 2 3 4 ... 7 8 1 2 3 ... 7 8
V4 V5
Item Line selection period Frame frequency
Clock / Frequency 400 clocks 84.4 Hz * fosc=270 kHz (1 clock = 3.7 s)
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
2) 1/11 duty cycle A) A-type Waveform 1-line selection period 1 VDD V1 COM1 ... ... ... 2 3 4 ... 10 11 1 2 3 ... 10 11
V4 V5
Item Line selection period Frame frequency
Clock / Frequency 400 clocks 61.4 Hz * fosc=270 kHz (1 clock = 3.7 s)
3) 1/16 duty cycle A) A-type Waveform 1-line selection period 1 VDD V1 COM1 ... ... ... 2 3 4 ... 15 16 1 2 3 ... 15 16
V4 V5
Item Line selection period Frame frequency
Clock / Frequency 200 clocks 84.4 Hz * fosc=270 kHz (1 clock = 3.7 s)
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INITIALIZING BY INSTRUCTION 1) 8-bit interface mode
Power on
Condition: fosc=270 kHz
Wait for more than 30 ms after VDD rises to 4.5 v
N Function set
RS 0 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 N DB2 F DB1 x DB0 x
0 1 0 1
1-line mode 2-line mode 5 x 7 dots 5 x 10 dots
F
Wait for more than 39 s
D Display ON/OFF Control
RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 1 DB2 D DB1 C DB0 B
0 1 0 1 0 1
display off display on cursor off cursor on blink off blink on
C
B
Wait for more than 39 s
Clear Display
RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1
Wait for more than 1.53 ms
I/D Entry Mode Set
RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 1 DB1 I/D DB0 SH
0 1 0 1
decrement mode increment mode entire shift off entire shift on
SH
Initialization end
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
2) 4-bit interface mode
Power on
Wait for more than 30 ms after Vdd rises to 4.5 v
Condition: fosc=270 kHz
Function set
RS 0 0 0 R/W 0 0 0 DB7 0 0 N DB6 0 0 F DB5 1 1 X DB4 0 0 X DB3 X X X DB2 X X X DB1 X X X DB0 X X X
N
0 1 0 1
1-line mode 2-line mode 5 x 7 Dots 5 x 10 Dots
F
Wait for more than 39 s
D Display On/Off Control
RS 0 0 R/W 0 0 DB7 0 1 DB6 0 D DB5 0 C DB4 0 B DB3 X X DB2 X X DB1 X X DB0 X X
0 1 0 1 0 1
display off display on cursor off cursor on blink off blink on
C
B
Wait for more than 39 s
Clear Display
RS 0 0 R/W 0 0 DB7 0 0 DB6 0 0 DB5 0 0 DB4 0 1 DB3 X X DB2 X X DB1 X X DB0 X X
Wait for more than 1.53 ms
Entry Mode Set
RS 0 0 R/W 0 0 DB7 0 0 DB6 0 1 DB5 0 I/D DB4 0 SH DB3 X X DB2 X X DB1 X X DB0 X X
I/D
0 1 0 1
decrement mode increment mode entire shift off entire shift on
SH
Initialization end
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
EXAMPLE OF INSTRUCTION AND DISPLAY CORRESPONDENCE 1. Power supply on: Initialized by the internal power on reset circuit.
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
LCD DISPLAY
2. Function Set: 8-bit, 2-line, 5x7 dot
RS 0 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 1 DB2 0 DB1 X DB0 X
3. Display ON/OFF Control: Display/Cursor on/Blink off
RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 1 DB2 1 DB1 1 DB0 0
_
4. Entry Mode Set: Increment
RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 1 DB1 1 DB0 0
_
5. Write Data to DDRAM: Write S
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 1 DB3 0 DB2 0 DB1 1 DB0 1
S_
6. Write Data to DDRAM: Write A
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1
SA_
7. Write Data to DDRAM: Write M
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 1 DB2 1 DB1 0 DB0 1
SAM_
8. Write Data to DDRAM: Write S
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 1 DB3 0 DB2 0 DB1 1 DB0 1
SAMS_
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
9. Write Data to DDRAM: Write U
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 1 DB3 0 DB2 1 DB1 0 DB0 1
SAMSU_
10. Write Data to DDRAM: Write N
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 1 DB2 1 DB1 1 DB0 0
SAMSUN_
11. Write Data to DDRAM: Write G
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 0 DB2 1 DB1 1 DB0 1
SAMSUNG_
12. Set DDRAM Address: 40H
RS 0 R/W 0 DB7 1 DB6 1 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 0
SAMSUNG _
13. Write Data to DDRAM: Write K
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 1 DB2 0 DB1 1 DB0 1
SAMSUNG K_
14. Write Data to DDRAM: Write S
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 1 DB3 0 DB2 0 DB1 1 DB0 1
SAMSUNG KS_
15. Write Data to DDRAM: Write 0
RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 0 DB1 0 DB0 0
SAMSUNG KS 0 _
16. Write Data to DDRAM: Write 0
RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 0 DB1 0 DB0 0
SAMSUNG KS 0 0_
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
17. Write Data to DDRAM: Write 7
RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 1 DB1 1 DB0 1
SAMSUNG KS0 0 7 _
18. Write Data to DDRAM: Write 2
RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 0 DB1 1 DB0 0
SAMSUNG KS0 0 7 2 _
19. Cursor or Display Shift: Cursor shift left
RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 1 DB3 0 DB2 0 DB1 X DB0 X
SAMSUNG KS 0 0 7 2
20. Write Data to DDRAM: Write 0
RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 0 DB1 0 DB0 0
SAMSUNG KS 0 0 7 0 _
21. Entry Mode Set: Entire Display shift Enable
RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 1 DB1 1 DB0 1
SAMSUNG KS 0 0 7 0 _
22. Write Data to DDRAM: Write B
RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 0 DB2 0 DB1 1 DB0 0
AMSUNG S0070B_
23. Return Home
RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 1 DB0 x
SAMSUNG KS 0 0 70B
24. Clear Display
RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1
_
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
MAXIMUM ABSOLUTE RATE Maximum Absolute Power Ratings Item Power supply voltage(1) Power supply voltage(2) Input voltage Symbol VDD VLCD VIN Unit V V V Value -0.3 to + 7.0 VDD -15.0 to VDD + 0.3 -0.3 to VDD + 0.3
* NOTE: Voltage greater than above may damage the circuit (VDD > V1 > V2 > V3 > V4 > V5)
Temperature Characteristics Item Operating temperature Storage temperature Symbol
Topr Tstg
Unit C C
Value -30 to + 85 -55 to + 125
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
ELECTRICAL CHARACTERISTICS DC Characteristics (VDD = 4.5V to 5.5V, Ta = -30 to +85 C) Symbol VDD IDD1 Supply Current IDD2 Input Voltage (1) (except OSC1) Input Voltage (2) (OSC1) Output Voltage (1) (DB0 to DB7) Output Voltage (2) (except DB0 to DB7) Voltage Drop Input Leakage Current Low Input Current Internal Clock (external Rf) VIH1 VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 VdCOM VdSEG IIL IIN fIC fEC External Clock duty tr, tf LCD Driving Voltage VLCD VDD-V5 (1/5, 1/4 Bias) Condition ceramic resonator fosc = 250 kHz Resistor oscillation external clock operation fosc = 270 kHz IOH = -0.205 mA IOL = 1.2 A IO = -40 A IO = 40 A IO = + 0.1 mA VIN = 0 V to VDD VIN = 0 V, VDD = 5 V (PULL UP) Rf = 91 k + 2% (VDD = 5 V) 2.2 -0.3 VDD-1.0 -0.2 2.4 0.9VDD -1 -50 190 150 45 4.6 Min 4.5 Typ 0.7 Max 5.5 1.0 mA 0.4 -125 270 250 50 0.6 VDD 0.6 VDD 1.0 V 0.4 0.1VDD 1 V 1 1 -250 350 350 55 0.2 10.0 A V V Unit V
Item Operating Voltage
V
kHz kHz % s V
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(VDD = 2.7 to 4.5V, Ta = -30 + 85C) Item Symbol VDD IDD1 Condition ceramic resonator fosc = 250 kHz Resistor oscillation external clock operation fosc = 270 kHz IOH = -0.1 mA IOL = 0.1 mA IO = -40 A IO = 40 A IO = + 0.1 mA VIN = 0 V to VDD VIN = 0 V, VDD = 3 V (PULL UP) Rf = 75 k + 2% (VDD = 3 V) 2.0 0.8VDD -1 -10 190 125 45 VDD-V5 (1/5, 1/4 Bias) 3.0 Min 2.7 Typ 0.3 Max 4.5 0.5 mA 0.7VDD -0.3 0.7VDD 0.17 -50 250 270 50 0.3 VDD 0.4 VDD 0.2VDD V 0.4 V 0.2VDD 1 V 1.5 1 -120 350 350 55 0.2 10.0 A V Unit V
Operating Voltage
Supply Current IDD2 Input Voltage (1) (except OSC1) Input Voltage (2) (OSC1) Output Voltage (1) (DB0 to DB7) Output Voltage (2) (except DB0 to DB7) VIH1 VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 VdCOM VdSEG IIL IIN fIC fEC External Clock duty tr, tf * LCD Driving Voltage VLCD
V
Voltage Drop Input Leakage Current Low Input Current Internal Clock (external Rf)
kHz kHz % s V
* LCD Driving Voltage (next page)
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
* LCD Driving Voltage POWER DUTY BIAS VDD V1 V2 V3 V4 V5 1/8, 1/11 DUTY 1/4 BIAS VDD VDD - VLCD/4 VDD - VLCD/2 VDD - VLCD/2 VDD - 3VLCD/4 VDD - VLCD 1/16 DUTY 1/5 BIAS VDD VDD - VLCD/5 VDD - 2VLCD/5 VDD - 3VLCD/5 VDD - 4VLCD/5 VDD - VLCD
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics
(VDD = 4.5 to 5.5 V, Ta = -30 to +85oC) Item E Cycle Time E Rise / Fall Time E Pulse Width (High, Low) Symbol tc tr,tf tw tsu1 th1 tsu2 th2 tc tr,tf tw tsu th tD tDH Min 500 220 40 10 60 10 500 220 40 10 20 Typ Max 25 25 120 ns ns Unit
Mode
Write Mode (Refer to Fig-6)
R/W and RS Setup Time R/W and RS Hold Time Data Setup Time Data Hold Time E Cycle Time E Rise / Fall Time E Pulse Width (High, Low)
Read Mode (Refer to Fig-7)
R/W and RS Setup Time R/W and RS Hold Time Data Output Delay Time Data Hold Time
(VDD = 2.7 to 4.5 V, Ta = -30 to +85oC) Mode E Cycle Time E Rise / Fall Time E Pulse Width (High, Low) Write Mode (Refer to Fig-6) R/W and RS Setup Time R/W and RS Hold Time Data Setup Time Data Hold Time E Cycle Time E Rise / Fall Time E Pulse Width (High, Low) Read Mode (Refer to Fig-7) R/W and RS Setup Time R/W and RS Hold Time Data Output Delay Time Data Hold Time Item Symbol tc tr,tf tw tsu1 th1 tsu2 th2 tc tr,tf tw tsu th tD tDH Min 1400 400 60 20 140 10 1400 400 60 20 5 Typ Max 25 25 360 ns ns Unit
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(VDD = 2.7 to 5.5 V, Ta = -30 to +85oC) Mode Item Clock Pulse Width (High, Low) Clock Rise / Fall Time Interface Mode with Extension Driver (Refer to Fig-8) Clock Setup Time Data Setup Time Data Hold Time M Delay Time Symbol tw tr,tf tSU1 tSU2 tDH tDw Min 800 500 300 300 -1000 Type Max 100 1000 ns Unit
RS
VIL1 tSU1
VIH1
th1
R/W
VIL1 tw
VIL1 th1 tf VIL1 tSU2
E
tr
VIH1
VIL1
VIH1
th2
VIL1
DB0~DB7
VIH1
VIL1
Valid Data tc
VIH1
VIL1
Fig-6. Write Mode Timing Diagram
KS0070B
16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
RS
VIH1
VIL1 tSU VIH1 tw th tf
th VIH1
R/W
E
tr
VIH1
VIL1 tD
VIH1
VIL1 tDH Valid Data tc
VIL1
DB0~DB7
VIH1
VIL1
VIH1
VIL1
Fig-7. Read Mode Timing Diagram
VOH2
tf tW VOH2 VOL2 tW
CLK1
tr
CLK2
VOL2
VOH2 tSU1
VOH2
VOL2 tW VOH2 VOL2
D
tSU1 tDH
M
tDM
VOL2
Fig-8. Interface Mode with Extension Driver Timing Diagram

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